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STM32F103C4T6A Datasheet(PDF) 73 Page - STMicroelectronics

No. de pieza STM32F103C4T6A
Descripción Electrónicos  Low-density performance line, ARM-based 32-bit MCU with 16 or 32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 com. interfaces
PDF  90 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F103C4T6A Datasheet(HTML) 73 Page - STMicroelectronics

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STM32F103x4, STM32F103x6
Electrical characteristics
Doc ID 15060 Rev 6
73/90
Figure 35.
Typical connection diagram using the ADC
1.
Refer to Table 46 for the values of RAIN, RADC and CADC.
2.
Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy
this, fADC should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown inFigure 36 or Figure 37,
depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be
ceramic (good quality). They should be placed them as close as possible to the chip.
Figure 36.
Power supply and reference decoupling (VREF+ not connected to VDDA)
1.
The VREF+ input is available only on the TFBGA64 package.
ai14150c
STM32F103xx
VDD
AINx
IL±1 µA
0.6 V
VT
RAIN(1)
Cparasitic
VAIN
0.6 V
VT
RADC(1)
12-bit
converter
CADC(1)
Sample and hold ADC
converter



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