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STM32F103RG Datasheet(PDF) 46 Page - STMicroelectronics |
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STM32F103RG Datasheet(HTML) 46 Page - STMicroelectronics |
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46 / 120 page ![]() Electrical characteristics STM32F103xF, STM32F103xG 46/120 Doc ID 16554 Rev 3 Table 16. Maximum current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Conditions fHCLK Max(1) 1. Based on characterization, tested in production at VDD max, fHCLK max with peripherals enabled. Unit TA = 85 °C TA = 105 °C IDD Supply current in Sleep mode External clock(2), all peripherals enabled 2. External clock is 8 MHz and PLL is on when fHCLK > 8 MHz. 72 MHz 47.5 48.5 mA 48 MHz 34 35 36 MHz 27.5 27.5 24 MHz 20 20.5 16 MHz 15 16 8 MHz 9 11 External clock(3), all peripherals disabled 72 MHz 9.5 11.2 48 MHz 7.7 9.5 36 MHz 6.9 8.5 24 MHz 5.9 7.8 16 MHz 5.4 7.2 8 MHz 4.7 6.4 |
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