STM32F101ZC datasheet(96/112 Pages) STMICROELECTRONICS

No. de pieza	STM32F101ZC

Descripción Electrónicos	High-density access line, ARM-based 32-bit MCU

PDF	112 Pages

Scroll/Zoom	100%

Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

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96 / 112 page

Electrical characteristics

STM32F101xC, STM32F101xD, STM32F101xE

96/112

Doc ID 14610 Rev 8

Figure 50.

Typical connection diagram using the ADC

Refer to Table 55 for the values of RAIN, RADC and CADC.

Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the

pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy

this, fADC should be reduced.

General PCB design guidelines

Power supply decoupling should be performed as shown in Figure 51 or Figure 52,

depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be

ceramic (good quality). They should be placed them as close as possible to the chip.

Figure 51.

Power supply and reference decoupling (VREF+ not connected to VDDA)

VREF+ and VREF- inputs are available only on 100-pin packages.

ai14139d

STM32F10xxx

VDD

AINx

IL±1 µA

0.6 V

RAIN(1)

Cparasitic

VAIN

0.6 V

RADC(1)

CADC(1)

12-bit

converter

Sample and hold ADC

converter

V REF+

STM32F10xxx

V DDA

V SSA/V REF-

1 µF // 10 nF

ai14380b

STM32F101ZC Datasheet(PDF) 96 Page - STMicroelectronics