AM27C4096-100DEB datasheet(6/12 Pages) AMD

6 / 12 page

Am27C4096

common connection to all devices in the array and con-

nected to the READ line from the system control bus.

This assures that all deselected memory devices are in

their low-power standby mode and that the output pins

are only active when data is desired from a particular

memory device.

System Applications

During the switch between active and standby condi-

tions, transient current peaks are produced on the ris-

ing and falling edges of Chip Enable. The magnitude of

these transient current peaks is dependent on the out-

put capacitance loading of the device. At a minimum, a

0.1 µF ceramic capacitor (high frequency, low inherent

inductance) should be used on each device between

VCC and VSS to minimize transient effects. In addition,

to overcome the voltage drop caused by the inductive

effects of the printed circuit board traces on EPROM ar-

rays, a 4.7 µF bulk electrolytic capacitor should be used

between VCC and VSS for each eight devices. The loca-

tion of the capacitor should be close to where the

power supply is connected to the array.

MODE SELECT TABLE

Notes:

1. VH = 12.0 V ± 0.5 V.

2. X = Either VIH or VIL.

3. A1–A8 and A10–17 = VIL.

4. See DC Programming Characteristics for VPP voltage during programming.

Mode

CE#/PGM#

OE#

VPP

Outputs

Read

VIL

DOUT

Output Disable

VIL

VIH

High Z

Standby (TTL)

VIH

High Z

Standby (CMOS)

VCC ± 0.3 V

High Z

Program

VIL

VIH

VPP

DIN

Program Verify

VIH

VIL

VPP

DOUT

Program Inhibit

VIH

VPP

High Z

Autoselect

(Note 3)

Manufacturer Code

VIL

01h

Device Code

VIL

VIH

19h

AM27C4096-100DEB Datasheet(PDF) 6 Page - Advanced Micro Devices

AM27C4096-100DEB Datasheet(HTML) 6 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12

Datasheet Descarga

Enlace URL