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TNETX15AEPGE Datasheet(PDF) 21 Page - Texas Instruments

No. de pieza TNETX15AEPGE
Descripción Electrónicos  ADDRESS-LOOKUP DEVICE
PDF  79 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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TNETX15AEPGE Datasheet(HTML) 21 Page - Texas Instruments

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TNETX15AE
ADDRESS-LOOKUP DEVICE
SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997
21
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
serial interface I/O register, SIO at 0x0A (DIO)
BIT
7
6
5
4
3
2
1
0
NMRST
MCLK
MTXEN
MDATA
MDIOEN
ECLOK
ETXEN
EDATA
Initial values after reset
0
0
0
MDIO
0
0
0
EDIO
The SIO register contains the control bits for two serial interfaces to the TNETX15AE. Setting the outbound
signals changes the state of the external terminal. Sampling the inbound signals gives the state of the external
terminal. The MII to the PHY devices has a serial management portion. This interface can have multiple
masters, and allows for two-way data between master and slave. The interface to the EEPROM is simpler
because it is a dedicated path between one TNETX15AE and its EEPROM. Although it is also serial and two
way, there is only one master.
BIT
NAME
FUNCTION
7
NMRST
MII not reset. The state of MNRST directly controls the state of the MRESET line (MII reset)
If NMRST is set to 0, the MRESET line is set to 0.
If NMRST is set to 1, the MRESET line is set to 1.
This bit is not self-clearing and must be manually deasserted. It can be set low and then immediately set high. Since
every PHY attached to the MII may not have a reset terminal, it may be necessary to toggle NMRST and also individually
reset each PHY through MII commands. The default state of this bit is 0 (MII is in reset). The MDIOEN bit must be set
to drive MRESET.
6
MCLK
MII SIO clock. MCLK controls the state of the MDCLK terminal. The MDIOEN bit must be set to drive MDCLK.
When MCLK is set to 1, MDCLK is set to 1.
When MCLK is set to 0, MDCLK is set to 0.
5
MTXEN
MII SIO transmit enable. MTXEN is used with the MDATA bit to read/write information from/to the MDIO terminal. The
MDIOEN bit must be set to drive MDIO.
When MTXEN is set to 1, the MDIO terminal is driven with the value in the MDATA bit.
When MTXEN is set to 0, MDATA is loaded with the value in the MDIO terminal.
4
MDATA
MII SIO data. MDATA is used with MTXEN to read/write information from/to the MDIO terminal.
When MTXEN is set to 1, MDIO is driven with the value in this bit.
When MTXEN is set to 0, this bit is loaded with the value on MDIO.
The MDIOEN bit must be set to drive MDIO. The default value of this bit is the value driven on the MDIO terminal.
3
MDIOEN
MII SIO data terminal enable. MDIOEN enables the high-Z control of the MDIO, MDCLK, and MRESET terminals.
Setting MDIOEN to 1 enables MII outputs.
Setting MDIOEN to 0 places MII outputs in a high-Z state.
The default state of this bit is 0 (MII disabled)
2
ECLOK
EEPROM SIO clock. ECLOK controls the state of the ECLK terminal.
When ECLOK is set to 1, ECLK is set to 1.
When ECLOK is set to 0, ECLK is set to 0.
1
ETXEN
EEPROM SIO transmit enable. ETXEN controls the direction of the EDIO terminal.
When ETXEN is set to 1, EDIO is driven with the value in the EDATA bit.
When ETXEN is set to 0, EDATA is loaded with the value on the EDIO terminal.
0
EDATA
EEPROM SIO data. EDATA is used to read or write the state of the EDIO terminal.
When EXTEN is set to 1, EDIO is driven with the value in this bit.
When EXTEN is set to 0, EDATA is loaded with the value on EDIO.
The default value of this bit is the value driven on the EDIO terminal.



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