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DSPIC33FJ06GS101TE/ML Datasheet(PDF) 18 Page - Microchip Technology |
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DSPIC33FJ06GS101TE/ML Datasheet(HTML) 18 Page - Microchip Technology |
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18 / 346 page ![]() dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 DS70318D-page 16 Preliminary © 2009 Microchip Technology Inc. FIGURE 1-1: dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 BLOCK DIAGRAM 16 OSC1/CLKI OSC2/CLKO VDD, VSS Timing Generation MCLR Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer Brown-out Reset Precision Reference Band Gap FRC/LPRC Oscillators Regulator Voltage VCAP/VDDCORE IC1,2 I2C1 PORTA Instruction Decode & Control PCH PCL 16 Program Counter 16-Bit ALU 23 23 24 23 Instruction Reg PCU 16 x 16 W Register Array ROM Latch 16 EA MUX 16 16 8 Interrupt Controller PSV & Table Data Access Control Block Stack Control Logic Loop Control Logic Data Latch Address Latch Address Latch Program Memory Data Latch 16 16 16 16 Data Latch Address Latch 16 X RAM Y RAM 16 Y Data Bus X Data Bus DSP Engine Divide Support 16 Control Signals to Various Blocks ADC1 Timers PORTB Address Generator Units 1-3 CNx UART1 PWM 4 x 2 Remappable Pins PORTC SPI1 OC1 OC2 Analog Comparators 1-4 Note: Not all pins or features are implemented on all device pinout configurations. See pinout diagrams for the specific pins and features present on each device. |
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