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IMX53IEC Datasheet(PDF) 22 Page - Freescale Semiconductor, Inc |
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IMX53IEC Datasheet(HTML) 22 Page - Freescale Semiconductor, Inc |
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22 / 173 page ![]() i.MX53 Applications Processors for Industrial Products, Rev. 6 22 Freescale Semiconductor Electrical Characteristics NVCC_SD1 Use maximal I/O Eq3, N=6 NVCC_SD2 Use maximal I/O Eq3, N=6 1 The results are based on calculation assuming the following conditions: —Four 16-bit DDR devices —Heavy use profile —On-Die Termination (ODT) of 50 Ω for DDR2 and 40 Ω for DDR3 —Dual rank termination schema —Command and Address line termination to NVCC_EMI_DRAM/2 voltage These numbers include both i.MX53 DDR controller I/O current consumption and DDR memory I/O power consumption for data and DQS lines. 2 50 μA current is the worst case for fast silicon at 125 °C. The typical current is 3 μA for typical silicon at 25 °C. 3 General Equation for estimated, maximal power consumption of an I/O power supply: Imax = N x C x V x (0.5 x F) Where: N - Number of I/O pins supplies by the power line C - Equivalent external capacitive load V - I/O voltage (0.5 x F) - Data change rate. Up to 0.5 of the clock rate (F). Table 8. Maximal Supply Currents (continued) Power Line Conditions Max Current Unit |
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