FEATURES

eroflex Circuit Technology - Advanced Multichip Modules © SCD3851 REV A 5/21/98

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ISO

9001

CIRCUIT TECHNOLOGY

www.aeroflex.com

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4 – 128K x 8 SRAMs & 4 – 512K x 8 Flash Die in

One MCM

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Access Times of 25ns, 35ns (SRAM) and

60ns, 70ns, 90ns (Flash)

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Organized as 128K x 32 of SRAM and 512K x 32

of Flash Memory with Common Data Bus

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Low Power CMOS

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Input and Output TTL Compatible Design

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MIL-PRF-38534 Compliant MCMs Available

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Decoupling Capacitors and Multiple Grounds for

Low Noise

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Commercial, Industrial and Military Temperature

Ranges

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Industry Standard Pinouts

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TTL Compatible Inputs and Outputs

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Packaging – Hermetic Ceramic

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66–Lead, PGA-Type, 1.385"SQ x 0.245"max,

Aeroflex code# "P1,P5 with/without shoulders)"

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68–Lead, Dual-Cavity CQFP(F2), 0.88"SQ x

.20"max (.18 max thickness available, contact

factory for details) (Drops into the 68 Lead

JEDEC .99"SQ CQFJ footprint)

FLASH MEMORY FEATURES

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Sector Architecture (Each Die)

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8 Equal Sectors of 64K bytes each

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Any combination of sectors can be erased with

one command sequence.

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+5V Programing, +5V Supply

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Embedded Erase and Program Algorithms

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Hardware and Software Write Protection

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Page Program Operation and Internal Program

Control Time.

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10,000 Erase/Program Cycles

Block Diagram – PGA Type Package(P1 & P5) & CQFP(F2)

ACT-SF41632 High Speed

Multichip Module

128Kx32 SRAM / 512Kx32 Flash

OE

SCE

FCE

PIN DESCRIPTION

Data I/O

Address Inputs

Flash Write Enables

FCE

Flash Chip Enable

SCE

SRAM Chip Enable

OE

Output Enable

NC

Not Connected

Power Supply

GND

Ground