RT8056

2

DS8056-02 April 2011

www.richtek.com

Function Block Diagram

Function Pin Description

Pin No.

Pin Name

Pin Function

1

FB2

Feedback Input of Channel 2.

2, 4

NC

No Internal Connection.

3

VIN

Power Supply Input of Channel 1 & Channel 2.

5

FB1

Feedback Input of Channel 1.

6

LX1

Switching Node of Channel 1.

7

EN1

Chip Enable of Channel 1 (Active High).

8,

11 (Exposed Pad)

GND

Ground. The Exposed Pad must be soldered to a large PCB and connected to GND

for maximum power dissipation.

9

EN2

Chip Enable of Channel 2 (Active High).

10

LX2

Switching Node of Channel 2.

COMP

RC

RS1

RS2

EN1/EN2

VIN

LX1/LX2

FB1/FB2

UVLO &

Power Good

Detector

Slope

Compensation

Current

Sense

OSC &

Shutdown

Control

Current

Limit

Detector

Driver

Control

Logic

PWM

Comparator

GND

Error

Amplifier

Typical Application Circuit

OUT1

OUT2

R1

V

= 0.6V x 1

R2

R3

V

= 0.6V x 1

R4

+

+

⎛⎞

⎜⎟

⎝⎠

⎛⎞

⎜⎟

⎝⎠

10µF

22µF

VIN

LX1

EN2

RT8056

EN1

LX2

2.2µH

2.8V to 5.5V

L1

10

6

3

7

8,

11 (Exposed Pad)

GND

9

Chip Enable

FB1

FB2

5

1

R1

R2

R3

R4

22µF

2.2µH

L2