REV. PrJ

PRELIMINARY TECHNICAL DATA

–5–

AD7450

PIN CONFIGURATION SOIC and µSOIC

PIN FUNCTION DESCRIPTION

Pin No.

Pin Mnemonic

Function

Reference Input for the AD7450. An external reference must be applied to this input. For a

5 V power supply, the reference is 2.5 V (±1%) and for a 3 V power supply, the reference is

1.25 V (±1%) for specified performance. This pin should be decoupled to GND with a

capacitor of at least 0.1µF. See the ‘Reference Section’ for more details.

Positive Terminal for Differential Analog Input.

Negative Terminal for Differential Analog Input.

4

G N D

Analog Ground. Ground reference point for all circuitry on the AD7450. All analog input

signals and any external reference signal should be referred to this GND voltage.

5

CS

Chip Select.

Active low logic input. This input provides the dual function of initiating a

conversion on the AD7450 and framing the serial data transfer.

6

SDATA

Serial Data. Logic Output. The conversion result from the AD7450 is provided on this

output as a serial data stream. The bits are clocked out on the falling edge of the SCLK

input.

The data stream consists of four leading zeros followed by the 12 bits of conversion

data which are provided MSB first. The output coding is two’s complement.

7

SCLK

Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part.

This clock input is also used as the clock source for the AD7450's conversion process.

GND with a 0.1µF Capacitor and a 10µF Tantalum Capacitor.

AD7450

(Not to Scale)

TOP VIEW

1

2

3

4

5

6

7

8

VREF

VIN +

VIN -

GND

CS

SDATA

SCLK

VDD