41594B datasheet(19/372 Pages) MICROCHIP

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 2011-2012 Microchip Technology Inc.

Preliminary

DS41594B-page 19

PIC12LF1840T48A

3.2.2

SPECIAL FUNCTION REGISTER

The Special Function Registers are registers used by

the application to control the desired operation of

peripheral functions in the device. The registers asso-

ciated with the operation of the peripherals are

described in the appropriate peripheral chapter of this

data sheet.

3.2.3

GENERAL PURPOSE RAM

There are up to 80 bytes of GPR in each data memory

bank.

3.2.3.1

Linear Access to GPR

The general purpose RAM can be accessed in a

non-banked method via the FSRs. This can simplify

access to large memory structures. See Section 3.5.2

“Linear Data Memory” for more information.

3.2.4

COMMON RAM

There are 16 bytes of common RAM accessible from all

banks.

FIGURE 3-2:

BANKED MEMORY

PARTITIONING

3.2.5

DEVICE MEMORY MAPS

The memory maps for the device family are as shown

in Table 3-2.

0Bh

0Ch

1Fh

20h

6Fh

70h

7Fh

00h

Common RAM

(16 bytes)

General Purpose RAM

(80 bytes maximum)

Core Registers

(12 bytes)

Special Function Registers

(20 bytes maximum)

Memory Region

7-bit Bank Offset

TABLE 3-2:

MEMORY MAP TABLES

Device

Banks

Table No.

PIC12LF1840T48A

0-7

Table 3-3

8-23

Table 3-4

24-31

Table 3-5

Table 3-6

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