Production Data

WM9082

w

PD, August 2012, Rev 4.1

13

The Control Code sequences are listed in Table 6.

DESCRIPTION

CONTROL CODE

Select 32kHz sample rate

32 x Code 4

Disable the input path HPF

32 x Code 5

Select 10ns output slew rate

32 x Code 6

32 x Code 9

Select 20ns output slew rate

32 x Code 3

Select 40ns output slew rate

32 x Code 3

32 x Code 6

32 x Code 9

Select ‘Best PSRR’ mode

32 x Code 6

32 x Code 10

32 x Code 6

32 x Code 10

32 x Code 6

32 x Code 10

Select ‘Best SNR’ mode

32 x Code 6

32 x Code 3

Table 6 WM9082 Configuration Events

If none of these Control Code sequences is received, then the WM9082 is configured for the following

default operating conditions:



Sample rate is 44.1kHz or 48kHz



Input path High Pass Filter (HPF) enabled



Output slew rate is 10ns



Default PSRR and SNR (see “Electrical Characteristics”)

Note that the default operating conditions are only restored on power-up or following a period when

the CLK input is stopped.

START-UP EVENTS

The WM9082 Class D output is enabled whenever PDM audio data is detected at the input pins, or

when a valid Start-Up Control Code is detected. The WM9082 Start-Up is selected under any of the

conditions described in Table 7. Each of these conditions results in a transition to the “ON” state.

Note that, if SPKVDD > 4.3V, then it is recommended to start up the WM9082 using Code 10; this

ensures that the device is optimally configured for the higher SPKVDD level.

Note that, when the start-up transition occurs as a result of PDM audio data, then the WM9082 will be

enabled in whichever mode had previously been selected (if any). In the case where the “ON” state

has not previously been selected, then the default (SPKVDD = 3.6V) mode is chosen.