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STEVAL-TDR001V1 Datasheet(PDF) 13 Page - STMicroelectronics |
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STEVAL-TDR001V1 Datasheet(HTML) 13 Page - STMicroelectronics |
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13 / 17 page ![]() STEVAL-TDR001V1 Package mechanical data 13/17 6.2 Thermal pad and via design SOT-89 Thernal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been designed to address thermal, power dissipation and electrical requirements of the device. The via pattern is based on thru-hole vias with 0.203 mm to 0.330 mm finished hole size on a 0.5 mm to 1.2 mm grid pattern with 0.025 plating on via walls. If micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results. Figure 13. Pad layout details |
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