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TNETA1585PGF Datasheet(PDF) 23 Page - Texas Instruments

No. de pieza TNETA1585PGF
Descripción Electrónicos  ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
PDF  32 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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TNETA1585PGF Datasheet(HTML) 23 Page - Texas Instruments

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TNETA1585
ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE
WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
SDNS041A – NOVEMBER 1996 – REVISED JULY 1998
23
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
timing requirements (see Figure 6)
parameter-memory interface – read operation
NO.
MIN
MAX
UNIT
1
tsu(PMDATA)
Setup time, PMDATA31–PMDATA0 valid before CLOCK
↑
3
ns
2
th(PMDATA)
Hold time, PMDATA31–PMDATA0 valid after CLOCK
↑
2
ns
operating characteristics over recommended operating conditions (see Figure 6)
parameter-memory interface – read operation
NO.
PARAMETER
MIN
MAX
UNIT
3
td(PMAD)
Delay time, from CLOCK
↑ to PMAD15–PMAD0 valid
5
12
ns
4
td(PMOE)
Delay time, from CLOCK
↑ to PMOE↓
5
13
ns
PMAD15–
PMAD0
(output)
PMOE
(output)
PMWE
(output)
Valid
PMDATA31–
PMDATA0
(input)
4
2
Valid
3
H
CLOCK
(input)
1
Figure 6. Parameter-Memory Interface – Read Operation



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