Arizona Microtek, Inc.

AZP51

Low Phase Noise Sine Wave/CMOS

to LVPECL Buffer/Divider

www.azmicrotek.com

+1-480-962-5881

5

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May 2012, Rev 2.1

The standard LVPECL loads are a pair of 50

Ω resistors connected between the outputs and V

resistors provide both the DC and the AC loads, assuming 50

Ω interconnect. If an additional supply is available within the

application, a four resistor termination configuration is possible (Figure 5).

M1

M2

M3

M4

D

M5

21.1mA

21.1mA

16mA

Q

Q

82

Ω

82

Ω

21.1mA - High

5.1mA - Low

External

Circuitry

Output

Stage

130

Ω

130

Ω

Figure 5 - Dual Supply Output Termination

Another termination variant eliminates the need for the additional supply (Figure 6). Alternately three resistors and

one capacitor accomplish the same termination and reduce power consumption.

M1

M2

M3

M4

D

M5

21.1mA

21.1mA

16mA

Q

Q

50

Ω

50

Ω

21.1mA - High

5.1mA - Low

External

Circuitry

Output

Stage

50

Ω

0.01µF

Figure 6 - Three Resistor Termination