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PA5750 Datasheet(PDF) 10 Page - Protek Devices |
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PA5750 Datasheet(HTML) 10 Page - Protek Devices |
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10 / 30 page ![]() PA5750 Low Power Stereo Audio CODEC With Speaker and Headphone Amplifier. ANALOG PRODUCTS DIVISION 561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715. 10 www.protekanalog.com Not for use in any life support systems. 95230 Rev.0. 04/09 6.1 Chip Control and Power Management 6.1.1. Register0 - Chip Control 1, Default 0000 0110 Bit Name Bit Description SCPReset 7 0 – Normal (Default). 1 – Reset control Port Register to Default. LRCM 6 0 – ALRCK disabled when both ADC disabled; DLRCK disabled when both DAC disabled (default). 1 – ALRCK and DLRCK disabled when all ADC and DAC disabled. DACMCLK 5 0 – when SameFs-1, ADCMCLK is the chip master clock source (default). 1 – when SameFs=1, DACMCLK is the chip master clock source. SameFs 4 0 – ADC Fs differs from DAC Fs (default). 1 – ADC Fs is the same as DAC Fs. SeqEn 3 0 – internal up/down sequence disable (default) 1 – internal up/down sequence enable. EnRef 2 0 – disable reference. 1 – enable reference (default). VMIDSEL 1:0 00 – VMID disabled. 01 – 50kΩ divider enabled. 10 – 500kΩ divider enabled (default). 11 – 5 kΩ divider enabled. 6.1.2. Register1 – Chip Control 2, Default 0001 1100 Bit Name Bit Description TSDEN 7 0 – thermal shutdown disabled (default). 1 – thermal shutdown enabled. PdnOC 6 0 – over current shutdown disabled (default). 1 – over current shut down enabled. LPVcmMOD 5 0 – normal (default). 1 – low power. LPVrefBuf 4 0 – normal. 1 – low power (default). PdnAna 3 0 – normal. 1 – entire analog power down (default). Pdanlbiasgen 2 0 – normal. 1 – ibiasgen power down(default). VrefLo 1 0 – normal (default). 1 – low power. PdnVrefbuf 0 0 – normal (default). 1 – low power. 6.1.3. Register2 – Chip Power Management, Default 1100 0011. Bit Name Bit Description adc_DigPDN 7 0 – normal. 1 – resets ADC DEM, filter and serial DATA port (default). dac_DigPDN 6 0 – normal. 1 – resets DAC DSM, DEM, filter and serial DATA port (default). adc_stm_rst 5 0 – normal (default). 1 – reset ADC state machine to power down state. dac_stm_rst 4 0 – normal (default). 1 – reset DAC state machine to power down state. ADCDLL_PDN 3 0 – normal (default). 1 – ADC_DLL power down, stop ADC clock. DACDLL_PDN 2 0 – normal (default). 1 – DAC_DLL power down, stop DAC clock adcVref_PDN 1 0 – ADC analog reference power up. 1 – ADC analog reference power down (default). dacVref_PDN 0 0 – DAC analog reference power up. 1 – DAC analog reference power down (default). |
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