Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA

1542E 12/16/10

ICS9FG108D

Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA

9

SMBus Table: Device Control Register, READ/WRITE ADDRESS (DC/DD)

Pin #

Name

Control Function

Type

0

1

Default

Bit 7

RW

Pin 27

Bit 6

RW

Pin 5

Bit 5

RW

Pin 44

Bit 4

RW

Pin 7

Bit 3

RW

Off

On

Pin 26

Bit 2

RW

Hardware

Select

Software

Select

0

Bit 1

RW

Driven

Hi-Z

0

Bit 0

RW

Down

Center

0

Notes:

1. These bits reflect the state of the corresponding pins at power up, but may be written to

if Byte 0, bit 2 is set to '1'. FS3 is the SEL14M_25M# pin.

SMBus Table: Output Enable Register

Pin #

Name

Control Function

Type

0

1

Default

Bit 7

DIF_7 EN

Output Enable

RW

Disable

Enable

1

Bit 6

DIF_6 EN

Output Enable

RW

Disable

Enable

1

Bit 5

DIF_5 EN

Output Enable

RW

Disable

Enable

1

Bit 4

DIF_4 EN

Output Enable

RW

Disable

Enable

1

Bit 3

DIF_3 EN

Output Enable

RW

Disable

Enable

1

Bit 2

DIF_2 EN

Output Enable

RW

Disable

Enable

1

Bit 1

DIF_1 EN

Output Enable

RW

Disable

Enable

1

Bit 0

DIF_0 EN

Output Enable

RW

Disable

Enable

1

Note:

SMBus Table: Output Stop Mode Register

Pin #

Name

Control Function

Type

0

1

Default

Bit 7

DIF_7 STOP EN Free Run/ Stop Enable

RW

Free-run Stop-able

0

Bit 6

DIF_6 STOP EN Free Run/ Stop Enable

RW

Free-run Stop-able

0

Bit 5

DIF_5 STOP EN Free Run/ Stop Enable

RW

Free-run Stop-able

0

Bit 4

DIF_4 STOP EN Free Run/ Stop Enable

RW

Free-run Stop-able

0

Bit 3

DIF_3 STOP EN Free Run/ Stop Enable

RW

Free-run Stop-able

0

Bit 2

DIF_2 STOP EN Free Run/ Stop Enable

RW

Free-run Stop-able

0

Bit 1

DIF_1 STOP EN Free Run/ Stop Enable

RW

Free-run Stop-able

0

Bit 0

DIF_0 STOP EN Free Run/ Stop Enable

RW

Free-run Stop-able

0

44

7

Byte 0

27

5

26

Spread Enable

1

-

Enable Software Control of Frequency,

Spread Enable (Spread Type always

Software Control)

-

DIF_STOP# drive mode

-

Spread Type

Byte 1

-

-

-

-

-

-

-

-

Byte 2

-

-

Byte 1 sets outputs active or inactive, not the conditons set by the OE inputs.

-

-

-

-

See Frequency

Selection Table,

Page 1

FS3

1

FS2

1

FS1

1

FS0

1

-

-