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LC877C40C Datasheet(PDF) 13 Page - Sanyo Semicon Device

No. de pieza LC877C40C
Descripción Electrónicos  8-bit 1-chip Microcontroller
PDF  21 Pages
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Fabricante Electrónico  SANYO [Sanyo Semicon Device]
Página de inicio  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC877C40C Datasheet(HTML) 13 Page - Sanyo Semicon Device

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LC877C64C/56C/48C/40C/32C/24C
No.A0135-13/21
Continued from preceding page.
Specification
Parameter
Symbol
Pin/Remarks
Conditions
VDD [V]
min
typ
max
unit
4.5 to 5.5
15
35
80
Resistance of
pull-up MOS Tr.
Rpu
• Ports 0, 1, 7
• Ports A, B, D, E
VOH=0.9VDD
2.2 to 4.5
18
50
150
k
Ω
VHYS(1)
• Ports 1, 7
• RES
2.2 to 5.5
0.1VDD
Hysterisis voltage
VHYS(2)
Port 87 small
signal input
2.2 to 5.5
0.1VDD
V
Pin capacitance
CP
All pins
• All Other Terminals Connected
To VSS.
• F=1MHz
• Ta=25
°C
2.2 to 5.5
10
pF
Input sensitivity
Vsen
Port 87 small
signal input
2.2 to 5.5
0.12VDD
Vp-p
Serial Input/Output Characteristics at Ta = -30°C to +70°C, VSS1 = VSS2 = VSS3 = 0V
1. SIO0 Serial I/O Characteristics (Note 4-1-1)
Specification
Parameter
Symbol
Pin/Remarks
Conditions
VDD [V]
min
typ
max
unit
Frequency
tSCK(1)
2
Low level
pulse width
tSCKL(1)
1
tSCKH(1)
See Fig. 6.
1
High level
pulse width
tSCKHA(1)
SCK0(P12)
• Continuous data
transmission/reception mode
• See Fig. 6.
• (Note 4-1-2)
2.2 to 5.5
4
Frequency
tSCK(2)
4/3
tCYC
Low level
pulse width
tSCKL(2)
1/2
tSCKH(2)
• CMOS output selected
• See Fig. 6.
1/2
tSCK
High level
pulse width
tSCKHA(2)
SCK0(P12)
• Continuous data
transmission/reception mode
• CMOS output selected
• See Fig. 6.
2.2 to 5.5
tSCKH(2)
+2tCYC
tSCKH(2)
+(10/3)
tCYC
tCYC
Data setup time
tsDI(1)
2.2 to 5.5
0.03
Data hold time
thDI(1)
SB0(P11),
SI0(P11)
• Must be specified with respect
to rising edge of SIOCLK.
• See Fig. 6.
2.2 to 5.5
0.03
tdD0(1)
• Continuous data
transmission/reception mode
• (Note 4-1-3)
2.2 to 5.5
(1/3)tCYC
+0.05
tdD0(2)
• Synchronous 8-bit mode
• (Note 4-1-3)
2.2 to 5.5
1tCYC
+0.05
Output delay
time
tdD0(3)
SO0(P10),
SB0(P11)
(Note 4-1-3)
2.2 to 5.5
(1/3)tCYC
+0.15
µs
Note 4-1-1: These specifications are theoretical values. Add margin depending on its use.
Note 4-1-2: To use serial-clock-input in continuous trans/rec mode, a time from SI0RUN being set when serial clock
is "H" to the first negative edge of the serial clock must be longer than tSCKHA.
Note 4-1-3: Must be specified with respect to falling edge of SIOCLK. Must be specified as the time to the beginning
of output state change in open drain output mode. See Fig. 6.



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