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CY2DP1504ZXIT Datasheet(PDF) 4 Page - Cypress Semiconductor

No. de pieza CY2DP1504ZXIT
Descripción Electrónicos  1:4 LVPECL Fanout Buffer with Selectable Clock Input
PDF  14 Pages
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Fabricante Electrónico  CYPRESS [Cypress Semiconductor]
Página de inicio  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2DP1504ZXIT Datasheet(HTML) 4 Page - Cypress Semiconductor

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CY2DP1504
Document Number: 001-56215 Rev. *F
Page 4 of 14
Absolute Maximum Ratings
Parameter
Description
Condition
Min
Max
Unit
VDD
Supply voltage
Nonfunctional
–0.5
4.6
V
VIN
[2]
Input voltage, relative to VSS
Nonfunctional
–0.5
lesser of 4.0
or VDD + 0.4
V
VOUT
[2]
DC output or I/O voltage, relative to VSS
Nonfunctional
–0.5
lesser of 4.0
or VDD + 0.4
V
TS
Storage temperature
Non functional
–55
150
°C
ESDHBM
Electrostatic discharge (ESD) protection
(Human body model)
JEDEC STD 22-A114-B
2000
–
V
LU
Latch up
Meets or exceeds JEDEC Spec
JESD78B IC Latchup Test
UL–94
Flammability rating
At 1/8 in
V-0
MSL
Moisture sensitivity level
3
Operating Conditions
Parameter
Description
Condition
Min
Max
Unit
VDD
Supply voltage
2.5-V supply
2.375
2.625
V
3.3-V supply
3.135
3.465
V
TA
Ambient operating temperature
Commercial
0
70
°C
Industrial
–40
85
°C
tPU
Power ramp time
Power-up time for VDD to reach
minimum specified voltage (power
ramp must be monotonic).
0.05
500
ms
Note
2. The voltage on any I/O pin cannot exceed the power pin during power up. Power supply sequencing is not required.
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