AD9552

Rev. C | Page 22 of 32

CS

SDIO

A12

W0

W1

R/W

A11 A10 A9

A8

A7

A6 A5

A4

A3 A2

A1 A0

D7 D6

D5

D4

D3

D2 D1

D0

D7

D6 D5

D4

D3 D2

D1 D0

DON'T CARE

DON'T CARE

DON'T CARE

16-BIT INSTRUCTION HEADER

REGISTER (N) DATA

REGISTER (N – 1) DATA

Figure 24. Serial Control Port Write—MSB First, 16-Bit Instruction, Two Bytes Data

CS

SCLK

SDIO

REGISTER (N) DATA

16-BIT INSTRUCTION HEADER

REGISTER (N – 1) DATA

REGISTER (N – 2) DATA

REGISTER (N – 3) DATA

A12

W0

W1

R/W

A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

DON'T CARE

DON'T CARE

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

Figure 25. Serial Control Port Read—MSB First, 16-Bit Instruction, Four Bytes Data

DON'T CARE

DON'T CARE

W1

W0

A12

A11

A10

A9A8A7A6A5

D4D3

D2D1D0

DON'T CARE

DON'T CARE

R/W

CS

SCLK

SDIO

Figure 26. Serial Control Port Write—MSB First, 16-Bit Instruction, Timing Measurements

DATA BIT N – 1

DATA BIT N

CS

SCLK

SDIO

Figure 27. Timing Diagram for Serial Control Port Register Read

CS

DON'T CARE

16-BIT INSTRUCTION HEADER

REGISTER (N) DATA

REGISTER (N + 1) DATA

SDIO

DON'T CARE

DON'T CARE

A0 A1 A2 A3

A4

A5 A6

A7

A8

A9 A10 A11 A12

D1

D0

R/W

W1

W0

D2 D3 D4

D5 D6

D7

D0

D1 D2

D3 D4 D5

D6

D7

Figure 28. Serial Control Port Write—LSB First, 16-Bit Instruction, Two Bytes Data

SCLK

SDIO

BIT N

BIT N + 1

CS

Figure 29. Serial Control Port Timing—Write