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SST25VF080B Datasheet(PDF) 9 Page - Silicon Storage Technology, Inc

No. de pieza SST25VF080B
Descripción Electrónicos  8 Mbit SPI Serial Flash
PDF  32 Pages
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Fabricante Electrónico  SST [Silicon Storage Technology, Inc]
Página de inicio  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST25VF080B Datasheet(HTML) 9 Page - Silicon Storage Technology, Inc

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Data Sheet
8 Mbit SPI Serial Flash
SST25VF080B
9
©2010 Silicon Storage Technology, Inc.
S71296-04-000
01/10
Read (25/33 MHz)
The Read instruction, 03H, supports up to 25 MHz (for
SST25VF080B-50-xx-xxxx)
or
33
MHz
(for
SST25VF080B-80-xx-xxxx) Read. The device outputs the
data starting from the specified address location. The data
output stream is continuous through all addresses until ter-
minated by a low to high transition on CE#. The internal
address pointer will automatically increment until the high-
est memory address is reached. Once the highest memory
address is reached, the address pointer will automatically
increment to the beginning (wrap-around) of the address
space. Once the data from address location 1FFFFFH has
been read, the next output will be from address location
000000H.
The Read instruction is initiated by executing an 8-bit com-
mand, 03H, followed by address bits [A23-A0]. CE# must
remain active low for the duration of the Read cycle. See
Figure 5 for the Read sequence.
FIGURE 5: Read Sequence
1296 ReadSeq_0.0
CE#
SO
SI
SCK
ADD.
01 2 3 4 5 6 7 8
ADD.
ADD.
03
HIGH IMPEDANCE
15 16
23 24
31 32
39 40
70
47
48
55 56
63 64
N+2
N+3
N+4
N
N+1
DOUT
MSB
MSB
MSB
MODE 0
MODE 3
DOUT
DOUT
DOUT
DOUT



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