PIC16F720-ESLASHML datasheet(166/244 Pages) MICROCHIP

166 / 244 page

PIC16F/LF720/721

DS41430A-page 166

 2010 Microchip Technology Inc.

18.6

Protection Against Spurious Write

There are conditions when the device should not write

to the program memory. To protect against spurious

writes, various mechanisms have been built in. On

power-up, WREN is cleared. Also, the Power-up Timer

(64 ms duration) prevents program memory writes.

The write initiates sequence and the WREN bit helps

prevent an accidental write during brown-out, power

glitch or software malfunction.

18.7

Operation During Code-Protect

When the device is code-protected, the CPU is able to

read and write unscrambled data to the program

memory.

18.8

Operation During Write-Protect

When the program memory is write-protected, the CPU

can read and execute from the program memory.

The

portions

program

memory

that

are

write-protected can be modified by the CPU using the

PMCON registers, but the protected program memory

cannot be modified using ICSP mode.

PMCON1: PROGRAM MEMORY CONTROL 1 REGISTER

U-1

R/W-0/0

R/W/HC-0/0

U-0

R/W-0/0

R/S/HC-0/0

—CFGS

LWLO

FREE

—WREN

bit 7

bit 0

Legend:

S = Setable bit, cleared in hardware

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

Unimplemented: Read as ‘1’

bit 6

CFGS: Flash Program/Data EEPROM or Configuration Select bit

Accesses Configuration, user ID and device ID registers

Accesses Flash program

bit 5

LWLO: Load Write Latches Only bit

The next WR command does not initiate a write to the PFM; only the program memory

latches are updated.

The next WR command writes a value from EEDATH:EEDATL into program memory latches

and initiates a write to the PFM of all the data stored in the program memory latches.

bit 4

FREE: Program Flash Erase Enable bit

Perform an program Flash erase operation on the next WR command (cleared by hardware

after completion of erase).

Perform a program Flash write operation on the next WR command.

bit 3

Unimplemented: Read as ‘0’

bit 2

WREN: Program/Erase Enable bit

Allows program/erase cycles.

Inhibits programming/erasing of Program Flash and Data EEPROM.

bit 1

WR: Write Control bit

Initiates a program Flash program/erase operation.

The operation is self-timed and the bit is cleared by hardware once operation is complete.

The WR bit can only be set (not cleared) in software.

Program/erase operation to the Flash is complete and inactive.

bit 0

RD: Read Control bit

Initiates an program memory read (The RD is cleared in hardware; the RD bit can only be set

(not cleared) in software).

Does not initiate a program memory read

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