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AT25DF641A Datasheet(PDF) 41 Page - ATMEL Corporation

No. de pieza AT25DF641A
Descripción Electrónicos  64-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory
PDF  57 Pages
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Fabricante Electrónico  ATMEL [ATMEL Corporation]
Página de inicio  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT25DF641A Datasheet(HTML) 41 Page - ATMEL Corporation

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41
8693A–DFLASH–8/10
Atmel AT25DF641A [Preliminary]
Figure 12-1. Reset
12.2
Read Manufacturer and Device ID
Identification information can be read from the device to enable systems to electronically query
and identify the device while it is in system. The identification method and the command opcode
comply with the JEDEC standard for “Manufacturer and Device ID Read Methodology for SPI
Compatible Serial Interface Memory Devices”. The type of information that can be read from the
device includes the JEDEC defined Manufacturer ID, the vendor specific Device ID, and the ven-
dor specific Extended Device Information.
The Read Manufacturer and Device ID command is limited to a maximum clock frequency of
f
CLK. Since not all Flash devices are capable of operating at very high clock frequencies, applica-
tions should be designed to read the identification information from the devices at a reasonably
low clock frequency to ensure that all devices to be used in the application can be identified
properly. Once the identification process is complete, the application can then increase the clock
frequency to accommodate specific Flash devices that are capable of operating at the higher
clock frequencies.
To read the identification information, the CS pin must first be asserted and the opcode of 9Fh
must be clocked into the device. After the opcode has been clocked in, the device will begin out-
putting the identification data on the SO pin during the subsequent clock cycles. The first byte
that will be output will be the Manufacturer ID followed by two bytes of Device ID information.
The fourth byte output will be the Extended Device Information (EDI) String Length, which will be
01h indicating that one byte of EDI data follows. After the one byte of EDI data is output, the SO
pin will go into a high-impedance state; therefore, additional clock cycles will have no affect on
the SO pin and no data will be output. As indicated in the JEDEC standard, reading the EDI
String Length and any subsequent data is optional.
Deasserting the CS pin will terminate the Manufacturer and Device ID read operation and put
the SO pin into a high-impedance state. The CS pin can be deasserted at any time and does not
require that a full byte of data be read.
SCK
CS
SI
SO
MSB
23
1
0
1111000
67
5
4
OPCODE
CONFIRMATION BYTE IN
10 11
9
814 15
13
12
0
MSB
110100
0
0
HIGH-IMPEDANCE



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