68HC705SP7 datasheet(31/230 Pages) FREESCALE

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MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0

General Release Specification

Memory

General Release Specification — MC68HC705JJ7/MC68HC705JP7

Section 2. Memory

2.1 Contents

2.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31

2.3

Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31

2.4

Input/Output Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32

2.5

Interrupt Vector Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

2.6

RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

2.7

EPROM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37

2.8

COP Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37

2.2 Introduction

This section describes the organization of the memory on the

MC68HC705JJ7/MC68HC705JP7.

2.3 Memory Map

The CPU can address 8 kilobytes of memory space as shown in

Figure 2-1. The EPROM portion of memory holds the program

instructions, fixed data, user defined vectors, and interrupt service

routines. The RAM portion of memory holds variable data. I/O registers

are memory mapped so that the CPU can access their locations in the

same way that it accesses all other memory locations.

Freescale Semiconductor, Inc.

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68HC705SP7 Datasheet(PDF) 31 Page - Freescale Semiconductor, Inc