68HC05CL48 datasheet(133/145 Pages) MOTOROLA

133 / 145 page

June 11, 1997

GENERAL RELEASE SPECIFICATION

MC68HC05CL48

MOTOROLA

REV 2.0

A-1

APPENDIX A

MC68HC705CL48

This appendix describes the differences between the MC68HC705CL48 and

MC68HC05CL48.

This part is for user system evaluation and debugging only, and is not

recommended for mass production.

A.1

INTRODUCTION

The MC68HC705CL48 is an EPROM version of the MC68HC05CL48, and is

available for user system evaluation and debugging only. The MC68HC705CL48

is functionally identical to the MC68HC05CL48 with the exception of the 47.5k-

byte user ROM replaced by 47.5k-byte user EPROM and, the self-check routine is

replaced by a bootstrap routine.

A.2

MEMORY

The MC68HC705CL48 memory map is shown in Figure A-1.

A.3

BOOTLOADER MODE

Bootloader mode is entered upon the rising edge of RESET if the IRQ/VPP pin is

at VTST and the PTB7 pin is at logic one. The Bootloader program and vectors are

masked in the ROM area from $FE00 to $FFEF. This program handles copying of

user code from an external EPROM into the on-chip EPROM. The bootload

function has to be done from an external EPROM. The bootloader performs one

programming pass at 1ms per byte then does a verify pass.

The user code must be a one-to-one correspondence with the internal EPROM

addresses.

68HC05CL48 Datasheet(PDF) 133 Page - Motorola, Inc