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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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68HC05CL48 Datasheet(PDF) 53 Page - Motorola, Inc |
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68HC05CL48 Datasheet(HTML) 53 Page - Motorola, Inc |
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53 / 145 page  June 11, 1997 GENERAL RELEASE SPECIFICATION MC68HC05CL48 TIMER MOTOROLA REV 2.0 8-1 SECTION 8 TIMER The MC68HC05CL48 has three timers: • 16-bit free-running timer • 15-stage multi-functional (core) timer • One second timer 8.1 16-BIT FREE-RUNNING TIMER The 16-bit free-running counter is driven by a fixed divide-by-four prescaler. This timer can be used for many purposes, including input waveform measurements while simultaneously generating an output waveform. Pulse widths can vary from several microseconds to many seconds. Refer to Figure 8-1 for a timer block diagram. Because the timer has a 16-bit architecture, each specific functional segment (capability) is represented by two registers. These registers contain the high and low byte of that functional segment. Generally, accessing the low byte of a specific timer function allows full control of that function; however, an access of the high byte inhibits that specific timer function until the low byte is also accessed. NOTE The I bit in the CCR should be set while manipulating both the high and low byte register of a specific timer function to ensure that an interrupt does not occur. |
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