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UJA1075TW/5V0/WD Datasheet(PDF) 44 Page - NXP Semiconductors

No. de pieza UJA1075TW/5V0/WD
Descripción Electrónicos  High-speed CAN/LIN core system basis chip
PDF  53 Pages
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Fabricante Electrónico  NXP [NXP Semiconductors]
Página de inicio  http://www.nxp.com
Logo NXP - NXP Semiconductors

UJA1075TW/5V0/WD Datasheet(HTML) 44 Page - NXP Semiconductors

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UJA1075_2
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 — 27 May 2010
44 of 53
NXP Semiconductors
UJA1075
High-speed CAN/LIN core system basis chip
Fig 17. Timing test circuit for LIN transceiver
SBC
BAT
DLIN
TXDL
RLIN
CLIN
RXDL
CRXDL
LIN
GND
015aaa128
Fig 18. LIN transceiver timing diagram
015aaa133
VTXDL
LIN bus signal
VBAT
tbit
tbus(rec)(min)
Vth(rec)RX(max)
thresholds of
receiving node A
Vth(dom)RX(max)
Vth(rec)RX(min)
Vth(dom)RX(min)
tPD(RX)r
tPD(RX)f
tPD(RX)r
tPD(RX)f
tbus(rec)(max)
tbit
tbit
thresholds of
receiving node B
output of receiving
node A
VRXDL
output of receiving
node B
VRXDL
tbus(dom)(max)
tbus(dom)(min)



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