AP5101

1.5A Step-Down Converter with 1.4MHz Switching

Frequency

AP5101

Document number: DS32258 Rev. 1 - 2

8 of 15

www.diodes.com

July 2010

© Diodes Incorporated

Applications Information

Operation

The AP5101 is a current mode control, asynchronous buck regulator. Current mode control assures excellent line and load

regulation and a wide loop bandwidth for fast response to load transients. Figure. 3 depicts the functional block diagram of

AP5101.

The operation of one switching can be explained as follows. At the beginning of each cycle, HS (high-side) MOSFET is off. The

EA output voltage is higher than the current sense amplifier output, and the current comparator’s output is low. The rising edge

of the 1.4MHz oscillator clock signal sets the RS Flip-Flop. Its output turns on HS MOSFET.

When the HS MOSFET is on, inductor current starts to increase. The Current Sense Amplifier senses and amplifies the

inductor current. Since the current mode control is subject to sub-harmonic oscillations that peak at half the switching

frequency, Ramp slope compensation is utilized. This will help to stabilize the power supply. This Ramp compensation is

summed to the Current Sense Amplifier output and compared to the Error Amplifier output by the PWM Comparator. When the

sum of the Current Sense Amplifier output and the Slope Compensation signal exceeds the EA output voltage, the RS Flip-

Flop is reset and HS MOSFET is turned off. The external Schottky rectifier diode (D1) conducts the inductor current.

For one whole switching cycle, if the sum of the Current Sense Amplifier output and the Slope Compensation signal does not

exceed the EA output, then the falling edge of the oscillator clock resets the Flip-Flop. The output of the Error Amplifier

as it is proportional to the EA voltage.

REGULATOR

REFERENCE

RAMP

GENERATOR

OSCILLATOR

1.4MHz/500KHz

RSEN

25mO

CURRENT SENSE AMPLIFIER

R

S

Q

R

DRIVER

REGULATOR

7

1

5

4

3

2

IN

EN

FB

GND

+

-

EA

ERROR AMPLIFIER

+

-

+

-

BST

SW

PWM

COMPARATOR

CURRENT LIMIT

COMPARATOR

6

COMP

8

GND

Figure 3. Functional Block Diagram