SC16C751B_2

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 02 — 10 October 2008

20 of 32

NXP Semiconductors

SC16C751B

5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs

7.8 Modem Status Register (MSR)

This register provides the current state of the control interface signals from the modem, or

other peripheral device to which the SC16C751B is connected. Four bits of this register

are used to indicate the changed information. These bits are set to a logic 1 whenever a

control input from the modem changes state. These bits are set to a logic 0 whenever the

CPU reads this register.

[1]

Whenever any MSR[0] is set to logic 1, a Modem Status Interrupt will be generated if modem status

interrupt is enabled.

7.9 Scratchpad Register (SPR)

The SC16C751B provides a temporary data register to store 8 bits of user information.

7.10 SC16C751B external reset conditions

Table 19.

Modem Status Register bits description

Bit

Symbol

Description

7:5

MSR[7:5]

reserved

4

MSR[4]

Clear To Send. CTS. CTS functions as hardware flow control signal input if it

is enabled via MCR[5]. Flow control (when enabled) allows starting and

stopping the transmissions based on the external modem CTS signal. A

logic 1 at the CTS pin will stop SC16C751B transmissions as soon as current

character has finished transmission. Normally MSR[4] is the complement of

the CTS input. However, in the Loopback mode, this bit is equivalent to the

RTS bit in the MCR register.

3:1

MSR[3:1]

reserved

0

MSR[0]

∆CTS [1]

logic 0 = no CTS change (normal default condition)

logic 1 = the CTS input to the SC16C751B has changed state since the last

time it was read. A modem Status Interrupt will be generated.

Table 20.

Reset state for registers

Register

Reset state

IER

IER[7:0] = 0

ISR

ISR[7:1] = 0; ISR[0] = 1

LCR

LCR[7:0] = 0

MCR

MCR[7:0] = 0

LSR

LSR[7] = 0; LSR[6:5] = 1; LSR[4:0] = 0

MSR

MSR[7:4] = input signals; MSR[3:0] = 0

FCR

FCR[7:0] = 0

Table 21.

Reset state for outputs

Output

Reset state

TX

HIGH

RTS

HIGH

INT

LOW