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74AVC2T45GD Datasheet(PDF) 21 Page - NXP Semiconductors |
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74AVC2T45GD Datasheet(HTML) 21 Page - NXP Semiconductors |
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21 / 32 page ![]() 74AVC2T45_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 21 of 32 NXP Semiconductors 74AVC2T45 Dual-bit, dual-supply voltage level translator/transceiver; 3-state 12. Waveforms [1] VCCI is the supply voltage associated with the data input port. [2] VCCO is the supply voltage associated with the output port. Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 6. The data input (nA, nB) to output (nB, nA) propagation delay times 001aak114 nA, nB input nB, nA output tPLH tPHL GND VI VOH VM VM VOL Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. Enable and disable times 001aae968 tPZL tPZH tPHZ tPLZ GND GND VI VCCO VOL VOH VM VM VM VX VY outputs disabled outputs enabled outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH DIR input Table 9. Measurement points Supply voltage Input[1] Output[2] VCC(A), VCC(B) VM VM VX VY 1.1 V to 1.6 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH − 0.1 V 1.65 V to 2.7 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH − 0.15 V 3.0 V to 3.6 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH − 0.3 V |
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