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WM0834CD Datasheet(PDF) 3 Page - Wolfson Microelectronics plc

No. de pieza WM0834CD
Descripción Electrónicos  8-Bit ADCs with Serial Interface and Configurable Input Multiplexer
PDF  16 Pages
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Fabricante Electrónico  WOLFSON [Wolfson Microelectronics plc]
Página de inicio  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM0834CD Datasheet(HTML) 3 Page - Wolfson Microelectronics plc

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Wolfson Microelectronics
3
WM0834, WM0838
Electrical Characteristics
(5V)
VCC = 5.0V, VREF = 5V, fCLK = 250 KHz, TA = TMIN to TMAX , tr = tf = 20ns, unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Digital Inputs
High level output voltage
VOH
VCC = 4.75 V, IOH = -360 mA
2.4
V
VCC = 4.75 V, IOH = -10 mA
4.5
V
Low level output voltage
VOL
VCC = 5.25 V, IOH = 1.6 mA
0.4
V
High level input current
IIH
VIH = 5 V
0.005
1
µA
Low level input current
IIL
VIL = 0 V
-0.005
-1
µA
High level output (source)
IOH
VOH = 0 V
-6.5
-24
mA
current
Low level output (sink) current
IOL
VOL = VCC
826
mA
High impedance-state
IOZ
VO = 5 V
0.01
3
µA
output current (DO)
VO = 0 V
-0.01
-3
µA
Input capacitance
Ci
5pF
Output capacitance
Co
5pF
Converter and Multiplexer
Total unadjusted error
TUE
VREF = 5 V. (note 7)
±1
LSB
Differential Linearity
(note 8)
8
Bits
Supply voltage variation error
Vs(error)
VCC = 4.75 V to 5.25 V
±1/16
±1/4
LSB
Common mode error
Differential mode
±1/16
±1/4
LSB
Common mode input voltage
VICR
(note 9)
GND-0.05
V
range
VCC+0.05
Standby input leakage
II(stdby)
On-channel VI = 5 V at ON ch.
1
µA
current (note 10)
Off-channel VI = 0 V at OFF ch.
-1
µA
On-channel VI = 0 V at ON ch.
-1
µA
Off-channel
VI = 5 V at OFF ch.
1
µA
Conversion time
tconv
Excluding MUX addressing time
8
clock
periods
Reference Inputs
Input resistance to
Ri(REF)
1.3
2.4
5.9
k
Ω
reference ladder
Total device
Supply current
ICC
0.6
1.25
mA
Timing Parameters
Setup time, CS low or
tsu
350
ns
data valid before clock
Hold time, data valid after
th
90
ns
clock
Propagation delay time,
MSB data first.
CL = 100 pF
1500
ns
output data after clock
tpd
LSB data first.
CL = 100 pF
600
ns
Output disable time, DO
tdis
CL = 10 pF, RL = 10 k
Ω
125
250
ns
after CS
CL = 100 pF, RL = 2 k
Ω
500
ns



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