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PPC5605BECLLR Datasheet(PDF) 42 Page - Freescale Semiconductor, Inc |
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PPC5605BECLLR Datasheet(HTML) 42 Page - Freescale Semiconductor, Inc |
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42 / 92 page ![]() MPC5607B Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Electrical characteristics Freescale Semiconductor 42 3.11.3.1 Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts ×(n+1) supply pin). This test conforms to the AEC-Q100-002/-003/-011 standard. 3.11.3.2 Static latch-up (LU) Two complementary static tests are required on six parts to assess the latch-up performance: • A supply overvoltage is applied to each power supply pin. • A current injection is applied to each input, output and configurable I/O pin. These tests are compliant with the EIA/JESD 78 IC latch-up standard. 3.12 Fast external crystal oscillator (4 to 16 MHz) electrical characteristics The device provides an oscillator/resonator driver. Figure describes a simple model of the internal oscillator driver and provides an example of a connection for an oscillator or a resonator. Table 30 provides the parameter description of 4 MHz to 16 MHz crystals used for the design simulations. Table 28. ESD absolute maximum ratings1,2 1 All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits. 2 A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device specification requirements. Complete DC parametric and functional testing shall be performed per applicable device specification at room temperature followed by hot temperature, unless specified otherwise in the device specification. Symbol Ratings Conditions Class Max value3 3 Data based on characterization results, not tested in production Unit VESD(HBM) Electrostatic discharge voltage (Human Body Model) TA = 25 °C conforming to AEC-Q100-002 H1C 2000 V VESD(MM) Electrostatic discharge voltage (Machine Model) TA = 25 °C conforming to AEC-Q100-003 M2 200 VESD(CDM) Electrostatic discharge voltage (Charged Device Model) TA = 25 °C conforming to AEC-Q100-011 C3A 500 750 (corners) Table 29. Latch-up results Symbol Parameter Conditions Class LU Static latch-up class TA = 125 °C conforming to JESD 78 II level A |
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