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MPC8544EBVTARF Datasheet(PDF) 97 Page - Freescale Semiconductor, Inc

No. de pieza MPC8544EBVTARF
Descripción Electrónicos  PowerQUICC??III Integrated Processor Hardware Specifications
PDF  120 Pages
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Fabricante Electrónico  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8544EBVTARF Datasheet(HTML) 97 Page - Freescale Semiconductor, Inc

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MPC8544E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 3
Freescale Semiconductor
97
Clocking
19.5
Security Controller PLL Ratio
Table 67 shows the SEC frequency ratio.
19.6
Frequency Options
19.6.1
SYSCLK to Platform Frequency Options
Table 68 shows the expected frequency values for the platform frequency when using a CCB clock to
SYSCLK ratio in comparison to the memory bus clock speed.
Table 67. SEC Frequency Ratio
Signal Name
Value (Binary)
CCB CLK:SEC CLK
LWE_B
0
2:11
13:12
Notes:
1. In 2:1 mode the CCB frequency must be operating <= 400 MHz.
2. In 3:1 mode any valid CCB can be used. The 3:1 mode is the default
ratio for security block.
Table 68. Frequency Options of SYSCLK with Respect to Memory Bus Speeds
CCB to SYSCLK
Ratio
SYSCLK (MHz)
33.33
41.66
66.66
83
100
111
133.33
Platform /CCB Frequency (MHz)
2
—
3
—333
400
4
—
333
400
445
533
5
333
415
500
6
400
500
8
333
533
9
375
10
333
417
12
400
500
16
533



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