AT89LP6440 datasheet(7/194 Pages) ATMEL

7 / 194 page

3706A–MICRO–9/09

AT89LP6440 - Preliminary

Timer 0 and Timer 1 in the AT89LP6440 are enhanced with two new modes. Mode 0 can be

configured as a variable 9- to 16-bit timer/counter and Mode 1 can be configured as a 16-bit

auto-reload timer/counter. In addition, the timer/counters may each independently drive an 8-bit

precision pulse width modulation output.

Timer 2 on the AT89LP6440 serves as a 16-bit time base for a 4-channel Compare/Capture

Array with up to four multi-phasic, variable precision (up to 16-bit) PWM outputs.

The enhanced UART of the AT89LP6440 includes Framing Error Detection and Automatic

Address Recognition. In addition, enhancements to Mode 0 allow hardware accelerated emula-

tion of half-duplex SPI or Two Wire interfaces.

The I/O ports of the AT89LP6440 can be independently configured in one of four operating

modes. In quasi-bidirectional mode, the ports operate as in the classic 8051. In input-only mode,

the ports are tristated. Push-pull output mode provides full CMOS drivers and open-drain mode

provides just a pull-down. In addition, all 8 pins of Port 1 can be configured to generate an inter-

rupt using the general-purpose interrupt interface.

2.1

Block Diagram

Figure 2-1.

AT89LP6440 Block Diagram

64K Bytes

Flash Code

Port 2

Configurable I/O

Port 1

Configurable I/O

UART

SPI

Timer 0

Timer 1

Dual Analog

Comparators

Watchdog

Timer

Internal

RC Oscillator

General-purpose

Interrupt

Configurable

Oscillator

Crystal or

Resonator

8K Bytes

Flash Data

Port 4

Configurable I/O

Port 3

Configurable I/O

Timer 2

Compare/

Capture Array

Port 0

Configurable I/O

TWI

8-channel 10-bit

ADC/DAC

256 Bytes

RAM

4K Bytes

ERAM

XRAM

Interface

8051 Single Cycle CPU

POR

BOD

Dual Data

Pointers

Multiply

Accumulate

(16 x 16)

On-Chip

Debug

AT89LP6440 Datasheet(PDF) 7 Page - ATMEL Corporation

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