Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

Preview PDF HTML

PCIMX515CJM6C Datasheet(PDF) 80 Page - Freescale Semiconductor, Inc

No. de pieza PCIMX515CJM6C
Descripción Electrónicos  i.MX51 Applications Processors for Consumer and Industrial Products
PDF  184 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PCIMX515CJM6C Datasheet(HTML) 80 Page - Freescale Semiconductor, Inc

Back Button PCIMX515CJM6C Datasheet HTML 76Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 77Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 78Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 79Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 80Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 81Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 82Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 83Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 84Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 80 / 184 page
background image
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1
80
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
Electrical Characteristics
3.7.8.5.3
TFT Panel Sync Pulse Timing Diagrams
Figure 51 depicts the horizontal timing (timing of one line), including both the horizontal sync pulse and
the data. All shown on the figure parameters are programmable. All controls are started by corresponding
internal events—local start points. The timing diagrams correspond to inverse polarity of the
IPP_DISP_CLK signal and active-low polarity of the HSYNC, VSYNC and DRDY signals.
Figure 51. TFT Panels Timing Diagram—Horizontal Sync Pulse
Figure 52 depicts the vertical timing (timing of one frame). All parameters shown in the figure are
programmable.
Figure 52. TFT Panels Timing Diagram—Vertical Sync Pulse
DI clock
VSYNC
HSYNC
DRDY
D0
D1
IP5o
IP13o
IP9o
IP8o
IP8
IP9
Dn
IP10
IP7
IP5
IP6
IPP_DISP_CLK
IPP_DATA
IP14
VSYNC
HSYNC
DRDY
Start of frame
End of frame
IP12
IP15
IP13
IP11



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com