AD8155ACPZ-R7 datasheet(32/36 Pages) AD

32 / 36 page

AD8155

Rev. 0 | Page 32 of 36

1.35mm × 1.35mm SQUARES

AT 1.65mm PITCH

COVERAGE: 68%

Figure 50.Typical Thermal Paddle Stencil Design

Large voids in the thermal paddle area should be avoided. To

control voids in the thermal paddle area, solder masking may be

required for thermal vias to prevent solder wicking inside the

via during reflow, thus displacing the solder away from the

interface between the package thermal paddle and thermal

paddle land on the PCB. There are several methods employed

for this purpose, such as via tenting (top or bottom side), using

dry film solder mask; via plugging with liquid photo-imagible

(LPI) solder mask from the bottom side; or via encroaching.

These options are depicted in Figure 51. In case of via tenting,

the solder mask diameter should be 100 microns larger than the

via diameter.

(A)

(B)

(D)

(C)

VIA

SOLDER

MASK

COPPE

PLATING

Figure 51. Solder Mask Options for Thermal Vias: (a) Via Tenting from the

Top; (b) Via Tenting from the Bottom; (c)Via Plugging, Bottom; and (d) Via

Encroaching, Bottom

A stencil thickness of 0.125 mm is recommended for 0.4 mm and

0.5 mm pitch parts. The stencil thickness can be increased to

0.15 mm to 0.2 mm for coarser pitch parts. A laser-cut, stainless

steel stencil is recommended with electropolished trapezoidal

walls to improve the paste release. Because not enough space is

available underneath the part after reflow, it is recommended

that no clean Type 3 paste be used for mounting the LFCSP.

Inert atmosphere is also recommended during reflow.

AD8155ACPZ-R7 Datasheet(PDF) 32 Page - Analog Devices