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SPT9693SCU Datasheet(PDF) 1 Page - Cadeka Microcircuits LLC. |
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SPT9693SCU Datasheet(HTML) 1 Page - Cadeka Microcircuits LLC. |
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1 / 10 page  QB QA GNDB QA QB LEB LEB N/C AVEE(B) AVCC(B) INB +INB +INA INA AVCC(A) LEA LEA N/C AVEE(A) GNDA SPT9693 WIDE INPUT VOLTAGE, JFET COMPARATOR TECHNICAL DATA MARCH 1, 2001 FEATURES • Common mode range –3.0 to +8.0 V • Low input bias current <100 pA • Propagation delay 1.5 ns (max) • Low offset ±25 mV • Low feedthrough and crosstalk • Differential latch control APPLICATIONS • Automated test equipment • High-speed instrumentation • Window comparators • High-speed timing • Line receivers • High-speed triggers • Threshold detection • Peak detection GENERAL DESCRIPTION The SPT9693 is a high-speed, wide common mode volt- age, JFET input, dual comparator. It is designed for appli- cations that measure critical timing parameters in which wide common mode input voltages of –3.0 to +8.0 V are required. Propagation delays are constant for overdrives greater than 50 mV. JFET inputs reduce the input bias currents to the nanoamp level, eliminating the need for input drivers and buffers in most applications. The device has differential analog inputs and complementary logic outputs com- patible with ECL systems. Each comparator has a complementary latch enable control that can be driven by standard ECL logic. The SPT9693 is available in 20-contact LCC and 20-lead PLCC packages over the commercial temperature range. It is also available in die form. BLOCK DIAGRAM |
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