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SPT9691SCU Datasheet(PDF) 6 Page - Cadeka Microcircuits LLC. |
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SPT9691SCU Datasheet(HTML) 6 Page - Cadeka Microcircuits LLC. |
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6 / 10 page ![]() SPT9691 GENERAL INFORMATION The SPT9691 is an ultrahigh-speed dual voltage compara- tor. It offers tight absolute characteristics. The device has differential analog inputs and complementary logic outputs compatible with ECL systems. The output stage is adequate for driving terminated 50 ohm transmission lines. The SPT9691 has a complementary latch enable control for each comparator. Both should be driven by standard ECL logic levels. A common mode voltage range of -4 V to +8 V is achieved by a proprietary JFET input design which requires a separate negative power supply (AVEE). The dual comparators have separate AVCC, AVEE, DVEE, and grounds for each comparator to achieve high crosstalk rejec- tion. Single channel operation can be accomplished by float- ing all pins (including the ground and supply pins) of the unused comparator. Power dissipation during single channel operation is 50% of the dissipation during dual channel operation. Figure 2 - Internal Function Diagram CLK BUF LE LE LATCH ECL OUT REF 1 REF 2 DVEE VCC GND PRE AMP + - +IN - IN AV EE Q Q 6 10/6/97 |
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