TLE2161, TLE2161A, TLE2161B

EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE

µPOWER OPERATIONAL AMPLIFIERS

SLOS049D – NOVEMBER 1989 – REVISED MAY 1996

26

POST OFFICE BOX 655303

APPLICATION INFORMATION

macromodel information

Macromodel information provided was derived using Microsim

Parts

™, the model generation software used

with Microsim

PSpice

™. The Boyle macromodel (see Note 5) and subcircuit in Figure 36 and Figure 37 were

output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):

4

dlp

ro2

99

VCC –

IN +

IN –

VCC+

OUT

8

5

ro1

–

+

vlim

7

vb

9

egnd

fb

92

dln

91

90

vln

vlp

hlim

+

–

–

–

+

+

+

+

–

–

6

53

–

vc

+

r2

C2

ga

gcm

dc

de

54

ve

–

+

rd2

rd1

C1

rss

3

iss

10

11

12

j2

j1

1

2

dp

rp

Figure 36. Boyle Macromodel

NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, ”Macromodeling of Integrated Circuit Operational Amplifiers”,

IEEE

Journal of Solid-State Circuits, SC-9, 353 (1974).

PSpice and Parts are trademark of MicroSim Corporation.