LTC2410IGN datasheet(30/48 Pages) LINER

30 / 48 page

LTC2410

APPLICATIO S I FOR ATIO

ity. Typical measured performance curves for output data

rates up to 100 readings per second are shown in Fig-

ures 27, 28, 29, 30, 31, 32, 33 and 34. In order to obtain

the highest possible level of accuracy from this converter

at output data rates above 20 readings per second, the

user is advised to maximize the power supply voltage used

and to limit the maximum ambient operating temperature.

In certain circumstances, a reduction of the differential

reference voltage may be beneficial.

Input Bandwidth

The combined effect of the internal Sinc4 digital filter and

of the analog and digital autocalibration circuits deter-

mines the LTC2410 input bandwidth. When the internal

oscillator is used with the notch set at 60Hz (FO = LOW),

the 3dB input bandwidth is 3.63Hz. When the internal

oscillator is used with the notch set at 50Hz (FO = HIGH),

the 3dB input bandwidth is 3.02Hz. If an external conver-

sion clock generator of frequency fEOSC is connected to the

FO pin, the 3dB input bandwidth is 0.236 • 10–6 • fEOSC.

Due to the complex filtering and calibration algorithms

utilized, the converter input bandwidth is not modeled very

accurately by a first order filter with the pole located at the

3dB frequency. When the internal oscillator is used, the

shape of the LTC2410 input bandwidth is shown in Fig-

ure 35 for FO = LOW and FO = HIGH. When an external

oscillator of frequency fEOSC is used, the shape of the

LTC2410 input bandwidth can be derived from Figure 35,

FO = LOW curve in which the horizontal axis is scaled by

fEOSC/153600.

The conversion noise (800nVRMS typical for VREF = 5V)

can be modeled by a white noise source connected to a

noise free converter. The noise spectral density is

62.75nV

√Hz for an infinite bandwidth source and

86.1nV

√Hz for a single 0.5MHz pole source. From these

numbers, it is clear that particular attention must be given

to the design of external amplification circuits. Such

circuits face the simultaneous requirements of very low

bandwidth (just a few Hz) in order to reduce the output

referred noise and relatively high bandwidth (at least

500kHz) necessary to drive the input switched-capacitor

network. A possible solution is a high gain, low bandwidth

amplifier stage followed by a high bandwidth unity-gain

buffer.

Figure 27. Offset Error vs Output Data Rate and Temperature

Figure 28. +FS Error vs Output Data Rate and Temperature

Figure 29. –FS Error vs Output Data Rate and Temperature

OUTPUT DATA RATE (READINGS/SEC)

102030405060708090 100

2410 F27

500

450

400

350

300

250

200

150

100

TA = 85°C

VCC = 5V

REF+ = 5V

REF – = GND

VINCM = 2.5V

VIN = 0V

FO = EXTERNAL OSCILLATOR

TA = 25°C

OUTPUT DATA RATE (READINGS/SEC)

102030405060708090 100

2410 F28

7000

6000

5000

4000

3000

2000

1000

TA = 85°C

VCC = 5V

REF+ = 5V

REF – = GND

IN+ = 3.75V

IN – = 1.25V

FO = EXTERNAL OSCILLATOR

TA = 25°C

OUTPUT DATA RATE (READINGS/SEC)

102030405060708090 100

2410 F29

–1000

–2000

–3000

–4000

–5000

–6000

–7000

TA = 85°C

VCC = 5V

REF+ = 5V

REF – = GND

IN+ = 1.25V

IN – = 3.75V

FO = EXTERNAL OSCILLATOR

TA = 25°C

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