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LTM4608

4608f

APPLICATIONS INFORMATION

Ratiometric tracking can be achieved by a few simple

calculations and the slew rate value applied to the master’s

track pin. As mentioned above, the TRACK pin has a control

range from 0V to 0.596V. The master’s TRACK pin slew

rate is directly equal to the master’s output slew rate in

Volts/Time:

kRFB

•10

where MR is the master’s output slew rate and SR is the

slave’s output slew rate in Volts/Time. When coincident

tracking is desired, then MR and SR are equal, thus RFB3

is equal the 10k. RFB4 is derived from equation:

TRACK

0 596

–

where VFB is the feedback voltage reference of the regula-

tor and VTRACK is 0.596V. Since RFB3 is equal to the 10k

top feedback resistor of the slave regulator in equal slew

rate or coincident tracking, then RFB4 is equal to RFB2 with

VFB = VTRACK. Therefore RFB3 = 10k and RFB4 = 6.65k in

Figure 5.

In ratiometric tracking, a different slew rate maybe desired

for the slave regulator. RFB3 can be solved for when SR

is slower than MR. Make sure that the slave supply slew

rate is chosen to be fast enough so that the slave output

voltage will reach it ﬁnal value before the master output.

For example: MR = 3.3V/ms and SR = 1.5V/ms. Then

RFB3 = 22.1k. Solve for RFB4 to equal to 4.87k.

For applications that do not require tracking or sequencing,

simply tie the TRACK pin to SVIN to let RUN control the

turn on/off. Connecting TRACK to SVIN also enables the

~100μs of internal soft-start during start-up. Load current

needs to be present during track down.

Power Good

The PGOOD pin is an open-drain pin that can be used to

monitor valid output voltage regulation. This pin monitors

a ±10% window around the regulation point. As shown

in Figure 20, the sequencing function can be realized in a

dual output application by controlling the RUN pins and the

PGOOD signals from each other. The 1.5V output begins

its soft starting after the PGOOD signal of 3.3V output

becomes high, and 3.3V output starts its shut down after

the PGOOD signal of 1.5V output becomes low. This can

be applied to systems that require voltage sequencing

between the core and sub-power supplies.

Slope Compensation

The module has already been internally compensated for

all output voltages. Table 3 is provided for most application

requirements. A spice model will be provided for other

control loop optimization. For single module operation,

connect ITHM pin to SGND. For parallel operation, tie ITHM

pins together and then connect to SGND at one point. Tie

ITH pins together to share currents evenly for all phases.

Figure 7. 3.3VIN, 2.5V and 1.5VOUT Power Loss

Figure 8. 5VIN, 3.3V and 1.5VOUT Power Loss

LOAD CURRENT (A)

2.0

2.5

3.0

4608 F07

1.5

1.0

0.5

4.0

3.5

3.3VIN 1.5VOUT

3.3VIN 2.5VOUT

LOAD CURRENT (A)

2.0

2.5

3.0

4608 F08

1.5

1.0

0.5

4.0

3.5

5VIN 1.5VOUT

5VIN 3.3VOUT

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