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LTM4601 Datasheet(PDF) 19 Page - Linear Technology |
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LTM4601 Datasheet(HTML) 19 Page - Linear Technology |
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19 / 28 page ![]() LTM4601/LTM4601-1 19 4601f APPLICATIO S I FOR ATIO for the noted conditions. These equivalent θJA parameters are correlated to the measured values, and are improved with air flow. The case temperature is maintained at 100°C or below for the derating curves. The maximum case temperature of 100°C is to allow for a rise of about 13°C to 25°C inside the µModule with a thermal resistance θJC from junction to case between 6°C/W to 9°C/W. This will maintain the maximum junction temperature inside the µModule below 125°C. Safety Considerations The LTM4601 modules do not provide isolation from VIN to VOUT. There is no internal fuse. If required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. Layout Checklist/Example The high integration of LTM4601 makes the PCB board layout very simple and easy. However, to optimize its electri- cal and thermal performance, some layout considerations are still necessary. • Use large PCB copper areas for high current path, in- cluding VIN, PGND and VOUT. It helps to minimize the PCB conduction loss and thermal stress. • Place high frequency ceramic input and output capaci- tors next to the VIN, PGND and VOUT pins to minimize high frequency noise. • Place a dedicated power ground layer underneath the unit. Refer frequency synchronization source to power ground. • To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. • Do not put vias directly on pads. • Use a separated SGND ground copper area for com- ponents connected to signal pins. Connect the SGND to PGND underneath the unit. Figure 15 gives a good example of the recommended layout. SIGNAL GND VOUT VIN GND COUT CIN CIN COUT 4601 F15 Figure 15. Recommended Layout |
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