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9202 Datasheet(PDF) 161 Page - STMicroelectronics

No. de pieza 9202
Descripción Electrónicos  Flash Programmable System Devices with 8032 Microcontroller Core
PDF  175 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

9202 Datasheet(HTML) 161 Page - STMicroelectronics

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UPSD3254A, UPSD3254BV, UPSD3253B, UPSD3253BV
Figure 82. Input Macrocell Timing (product term clock)
Table 126. Input Macrocell Timing (5V Devices)
Note: 1. Inputs from Port A, B, and C relative to register/ latch clock from the PLD. ALE/AS latch timings refer to tAVLX and tLXAX.
Table 127. Input Macrocell Timing (3V Devices)
Note: 1. Inputs from Port A, B, and C relative to register/latch clock from the PLD. ALE latch timings refer to tAVLX and tLXAX.
Symbol
Parameter
Conditions
Min
Max
PT
Aloc
Turbo
Off
Unit
tIS
Input Setup Time
(Note 1)
0ns
tIH
Input Hold Time
(Note 1)
15
+ 10
ns
tINH
NIB Input High Time
(Note 1)
9ns
tINL
NIB Input Low Time
(Note 1)
9ns
tINO
NIB Input to Combinatorial Delay
(Note 1)
34
+ 2
+ 10
ns
Symbol
Parameter
Conditions
Min
Max
PT
Aloc
Turbo
Off
Unit
tIS
Input Setup Time
(Note 1)
0ns
tIH
Input Hold Time
(Note 1)
25
+ 20
ns
tINH
NIB Input High Time
(Note 1)
12
ns
tINL
NIB Input Low Time
(Note 1)
12
ns
tINO
NIB Input to Combinatorial Delay
(Note 1)
46
+ 4
+ 20
ns
tINH
tINL
tINO
tIH
tIS
PT CLOCK
INPUT
OUTPUT
AI03101



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