TDF8553J datasheet(21/47 Pages) NXP

21 / 47 page

TDF8553J_1

Objective data sheet

Rev. 01 — 3 December 2008

21 of 47

NXP Semiconductors

TDF8553J

× 50 Watt power ampliﬁer and multiple voltage regulator

Limiting values

Table 13.

Data byte DB4 bit description

Bit

Symbol

Description

7D7

6D6

channel 1 DC load detection

0 = DC load detected

1 = no DC load detected

channel 1 AC load detected

0 = no AC load detected

1 = AC load detected

channel 1 load short-circuit

0 = normal load

1 = short-circuit load

channel 1 output offset

0 = no output offset

1 = output offset

channel 1 short-circuit to VP

0 = no short-circuit to VP

1 = short-circuit to VP

channel 1 short-circuit to ground

0 = no short-circuit to ground

1 = short-circuit to ground

Table 14.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

supply voltage

operating

not operating

−1

+50

jump starts for t

≤ 10

minutes

-30

load dump protection for

≤ 50 ms and tr ≥ 2.5 ms

050

VSDA

voltage on pin SDA

operating

VSCL

voltage on pin SCL

operating

input voltage

pins INn, SVR, ACGND,

DIAG, operating

013

VSTB

voltage on pin STB

operating

IOSM

non-repetitive peak output current

IORM

repetitive peak output current

VP(sc)

short-circuit supply voltage

across output pin loads

and to ground or supply

(AC and DC)

-18

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