M38047FBHKP datasheet(44/387 Pages) RENESAS

44 / 387 page

1-26

REJ09B0212-0100Z

Rev.1.00

Jan 14, 2005

3804 Group (Spec.H)

HARDWARE

FUNCTIONAL DESCRIPTION

Fig. 20 Structure of interrupt-related registers

Interrupt edge selection register

INT0 active edge selection bit

INT1 active edge selection bit

Not used (returns “0” when read)

INT2 active edge selection bit

INT3 active edge selection bit

INT4 active edge selection bit

INT0, INT4 interrupt switch bit

0 : INT00, INT40 interrupt

1 : INT01, INT41 interrupt

Not used (returns “0” when read)

(INTEDGE : address 003A16)

Interrupt request register 1

INT0/Timer Z interrupt request bit

INT1 interrupt request bit

Serial I/O1 receive interrupt request bit

Serial I/O1 transmit/SCL, SDA interrupt

request bit

Timer X interrupt request bit

Timer Y interrupt request bit

Timer 1 interrupt request bit

Timer 2 interrupt request bit

Interrupt control register 1

0 : No interrupt request issued

1 : Interrupt request issued

(IREQ1 : address 003C16)

(ICON1 : address 003E16)

Interrupt request register 2

CNTR0/SCL, SDA interrupt request bit

CNTR1/Serial I/O3 receive interrupt

request bit

Serial I/O2/Timer Z interrupt request bit

INT2/I2C interrupt request bit

INT3 interrupt request bit

INT4/CNTR2 interrupt request bit

AD converter/Serial I/O3 transmit

interrupt request bit

Not used (returns “0” when read)

(IREQ2 : address 003D16)

Interrupt control register 2

0 : Interrupts disabled

1 : Interrupts enabled

(ICON2 : address 003F16)

0 : Falling edge active

1 : Rising edge active

0 : Falling edge active

1 : Rising edge active

CNTR0/SCL, SDA interrupt enable bit

CNTR1/Serial I/O3 receive interrupt

enable bit

Serial I/O2/Timer Z interrupt enable bit

INT2/I2C interrupt enable bit

INT3 interrupt enable bit

INT4/CNTR2 interrupt enable bit

AD converter/Serial I/O3 transmit

interrupt enable bit

Not used (returns “0” when read)

INT0/Timer Z interrupt enable bit

INT1 interrupt enable bit

Serial I/O1 receive interrupt enable bit

Serial I/O1 transmit/SCL, SDA interrupt

enable bit

Timer X interrupt enable bit

Timer Y interrupt enable bit

Timer 1 interrupt enable bit

Timer 2 interrupt enable bit

Interrupt source selection register

INT0/Timer Z interrupt source selection bit

0 : INT0 interrupt

1 : Timer Z interrupt

Serial I/O2/Timer Z interrupt source selection bit

0 : Serial I/O2 interrupt

1 : Timer Z interrupt

Serial I/O1 transmit/SCL, SDA interrupt source selection bit

0 : Serial I/O1 transmit interrupt

1 : SCL, SDA interrupt

CNTR0/SCL, SDA interrupt source selection bit

0 : CNTR0 interrupt

1 : SCL, SDA interrupt

INT4/CNTR2 interrupt source selection bit

0 : INT4 interrupt

1 : CNTR2 interrupt

INT2/I2C interrupt source selection bit

0 : INT2 interrupt

1 : I2C interrupt

CNTR1/Serial I/O3 receive interrupt source selection bit

0 : CNTR1 interrupt

1 : Serial I/O3 receive interrupt

AD converter/Serial I/O3 transmit interrupt source selection bit

0 : A/D converter interrupt

1 : Serial I/O3 transmit interrupt

(Do not write “1” to these bits simultaneously.)

(INTSEL: address 003916)

(Do not write “1” to these bits simultaneously.)

M38047FBHKP Datasheet(PDF) 44 Page - Renesas Technology Corp

M38047FBHKP Datasheet(HTML) 44 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL