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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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H8SX/1663M Datasheet(PDF) 541 Page - Renesas Technology Corp |
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H8SX/1663M Datasheet(HTML) 541 Page - Renesas Technology Corp |
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541 / 1504 page  Section 11 EXDMA Controller (EXDMAC) Rev. 2.00 Sep. 24, 2008 Page 509 of 1468 REJ09B0412-0200 (3) Block Transfer Mode In block transfer mode, one block is transferred in response to one transfer request, and after the transfer, the bus is released. Figure 11.28 shows an example of transfer when ETEND output is enabled, and word-size, block transfer mode is performed from external 16-bit, 2-state access space to external 16-bit, 2-state access space. EXDMA read EXDMA read EXDMA write Address bus EXDMA write EXDMA read EXDMA read EXDMA write EXDMA write B φ RD LHWR, LLWR ETEND Bus release Bus release Bus release Last block transfer cycle Block transfer Figure 11.28 Example of Block Transfer Mode Transfer |
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