Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

HD64F2149YV Datasheet(PDF) 169 Page - Renesas Technology Corp

No. de pieza HD64F2149YV
Descripción Electrónicos  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F2149YV Datasheet(HTML) 169 Page - Renesas Technology Corp

Back Button HD64F2149YV Datasheet HTML 165Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 166Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 167Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 168Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 169Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 170Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 171Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 172Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 173Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 169 / 1075 page
background image
Section 6 Bus Controller
Rev. 3.00 Jan 18, 2006 page 141 of 1044
REJ09B0280-0300
6.1.3
Pin Configuration
Table 6.1 summarizes the pins of the bus controller.
Table 6.1
Bus Controller Pins
Name
Symbol
I/O
Function
Address strobe
AS
Output
Strobe signal indicating that address output on
address bus is enabled (when IOSE bit is 0)
I/O select
IOS
Output
I/O select signal (when IOSE bit is 1)
Read
RD
Output
Strobe signal indicating that external space is
being read
High write
HWR
Output
Strobe signal indicating that external space is
being written to, and that the upper data bus
(D15 to D8) is enabled
Low write
LWR
Output
Strobe signal indicating that external space is
being written to, and that the lower data bus
(D7 to D0) is enabled
Wait
WAIT
Input
Wait request signal when external 3-state
access space is accessed
6.1.4
Register Configuration
Table 6.2 summarizes the registers of the bus controller.
Table 6.2
Bus Controller Registers
Name
Abbreviation
R/W
Initial Value
Address*
Bus control register
BCR
R/W
H'D7
H'FFC6
Wait state control register
WSCR
R/W
H'33
H'FFC7
Note:
*
Lower 16 bits of the address.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com