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HD64F2149YV Datasheet(PDF) 357 Page - Renesas Technology Corp

No. de pieza HD64F2149YV
Descripción Electrónicos  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
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HD64F2149YV Datasheet(HTML) 357 Page - Renesas Technology Corp

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Section 11 16-Bit Free-Running Timer
Rev. 3.00 Jan 18, 2006 page 329 of 1044
REJ09B0280-0300
11.3.2
Output Compare Output Timing
When a compare-match occurs, the logic level selected by the output level bit (OLVLA or
OLVLB) in TOCR is output at the output compare pin (FTOA or FTOB). Figure 11.5 shows the
timing of this operation for compare-match A.
N + 1
N
N + 1
N
N
OCRA
φ
Compare-match A
signal
FRC
OLVLA
Output compare A
output pin FTOA
Clear*
Note: * Vertical arrows (
) indicate instructions executed by software.
N
Figure 11.5 Timing of Output Compare A Output



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