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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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M306V2EEFS Datasheet(PDF) 28 Page - Renesas Technology Corp |
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M306V2EEFS Datasheet(HTML) 28 Page - Renesas Technology Corp |
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28 / 271 page  Rev.1.40 Oct 06, 2004 page 28 of 269 M306V2ME-XXXFP, M306V2EEFP P00 to P07 I/O port Data bus Data bus Data bus Data bus I/O port Either CS1 or CS2 is for multiplexed bus and others are for separate bus (separate bus) Multiplexed bus for the entire space Single-chip mode Memory expansion mode/microprocessor modes Memory expansion mode Data bus width BYTE pin level Port P40 to P43 function select bit = 0 “01”, “10” “00” “11” (Note 1) 8 bits = “H” 8 bits = “H” 16 bits = “L” 8 bits = “H” 16 bits = “L” Notes 1: In memory expansion mode, select a 8-bit multiplex bus. The processor operates using the separate bus after reset is revoked, so the entire space multiplexed bus cannot be chosen in microprocessor mode. The higher-order address becomes a port if the entire space multiplexed bus is chosen, so only 256 bytes can be used in each chip select. 2: Address bus when in separate bus mode. Processor mode Multiplexed bus space select bit CS (chip select) or programmable I/O port (For details, refer to “2.4.4 Bus control”) Outputs RD, WRL, WRH, and BCLK or RD, BHE, WR, and BCLK (For details, refer to “2.4.4 Bus control”) Port P40 to P43 function select bit = 1 P10 to P17 I/O port I/O port Data bus I/O port Data bus I/O port P21 to P27 I/O port Address bus Address bus Address bus Address bus Address bus /data bus(Note 3) /data bus(Note 3) /data bus P20 I/O port Address bus Address bus Address bus Address bus Address bus /data bus(Note 3) /data bus P30 I/O port Address bus Address bus Address bus Address bus A8/D7 /data bus(Note 3) P31 to P37 I/O port Address bus Address bus Address bus Address bus I/O port P40 to P43 I/O port I/O port I/O port /O port I/O port I/O port P40 to P43 I/O port Address bus Address bus Address bus Address bus I/O port P44 to P47 I/O port P50 to P53 I/O port P54 I/O port HLDA HLDA HLDA HLDA HLDA P55 I/O port HOLD HOLD HOLD HOLD HOLD P56 I/O port ALE ALE ALE ALE ALE P57 I/O port RDY RDY RDY RDY RDY Table 2.4.2 Pin functions for each processor mode In memory expansion mode, select a 8-bit multiplex bus. The processor operates using the separate bus after reset is revoked, so the entire space multiplexed bus cannot be chosen in microprocessor mode. The higher-order address becomes a port if the entire space multiplexed bus is chosen, so only 256 bytes can be used in each chip select. |
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