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STPC4EDBI Datasheet(PDF) 14 Page - STMicroelectronics

No. de pieza STPC4EDBI
Descripción Electrónicos  X86 Core PC Compatible Information Appliance System-on-Chip
PDF  93 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPC4EDBI Datasheet(HTML) 14 Page - STMicroelectronics

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PIN DESCRIPTION
14/93
Release 1.5 - January 29, 2002
PCS3#,PCS1#,SCS3#,SCS1#
O
BD8STRUP_FT
Primary & Secondary Chip Selects
4
DIORDY
O
BD8STRUP_FT
Data I/O Ready
1
PIRQ, SIRQ
I
BD4STRP_FT
Primary & Secondary Interrupt Request
2
PDRQ, SDRQ
I
BD4STRP_FT
Primary & Secondary DMA Request
2
PDACK#, SDACK#
O
BD8STRP_FT
Primary & Secondary DMA Acknowledge
2
PDIOR#, SDIOR#
O
BD8STRUP_FT
Primary & Secondary I/O Channel Read
2
PDIOW#, SDIOW#
O
BD8STRUP_FT
Primary & Secondary I/O Channel Write
2
VGA CONTROLLER
RED, GREEN, BLUE
O
VDDCO
Analog Red, Green, Blue
3
VSYNC
O
BD4STRP_FT
Vertical Sync
1
HSYNC
O
BD4STRP_FT
Horizontal Sync
1
VREF_DAC1
I
ANA
DAC Voltage reference
1
RSET
I
ANA
Resistor Set
1
COMP
I
ANA
Compensation
1
COL_SEL
O
BD4STRP_FT
Colour Select
1
VIDEO INPUT PORT
VCLK
I
BD8STRP_FT
27-33 MHz Video Input Port Clock
1
VIN[7:0]
I
BD4STRP_FT
CCIR 601 or 656 YUV Video Data Input
8
ANALOG TV OUTPUT PORT
RED_TV, GREEN_TV, BLUE_TV
O
VDDCO
Analog RGB or S-VHS outputs
3
CVBS
O
VDDCO
Analog video composite output
1
IREF1_TV
I
ANA
Reference current of CVBS DAC
1
VREF1_TV
I
ANA
Reference voltage of CVBS DAC
1
IREF2_TV
I
ANA
Reference current of RGB DAC
1
VREF2_TV
I
ANA
Reference voltage of RGB DAC
1
VSSA_TV
I
Analog Vss for DAC
1
VDDA_TV
I
VDDCO
Analog Vdd for DAC
1
VCS
I/O
BD4STRP_FT
Composite Synchro
Horizontal Line Synchro
1
ODD_EVEN
I/O
BD4STRP_FT
Frame Synchronisation
1
MISCELLANEOUS
SPKRD
O
BD4STRP_FT
Speaker Device Output
1
SCL
I/O
BD4STRUP_FT
I²C Interface - Clock
Can be used for VGA DDC[1] signal
1
SDA
I/O
BD4STRUP_FT
I²C Interface - Data
Can be used for VGA DDC[0] signal
1
SCAN_ENABLE
I
TLCHTD_TC
Reserved (Test pin)
1
TCLK
I
TLCHT_FT
Test Clock
1
TDI
I
TLCHT_FT
Test Data Input
1
TMS
I
TLCHT_FT
Test Mode Set
1
TDO
O
BT8TRP_TC
Test Data output
1
Table 2-2. Definition of Signal Pins
Signal Name
Dir
Buffer Type2
Description
Qty
Note1: These pins are must be connected to the 2.5 V power supply. They must not be connected to the 3.3 V supply.
Note2: See Table 2-3 for buffer type descriptions



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